It has become commonplace to connect a host processor to different devices using a plurality of conducting wires referred to as a “bus” that typically complies with well known standards. The devices connected to the bus may include memory/storage devices, communications devices, sensing devices, etc. and these devices may be either fixed or removable. In most situations, some or all of the wires that define the bus are shared amongst any and all of the devices that are connected to the bus. Since the devices coupled to the bus share the same conducting wires, each device is typically assigned a unique ID or address on the bus and is configured to respond only to messages that are addressed to that unique ID/address. In this way, multiple devices can share the same conducting wires that form the bus resulting in a substantially reduced bus size than would otherwise be required.
Some buses are designed for use by a particular class of devices such as memory (e.g., a memory bus), input/output devices (e.g. an I/O bus) or other types of peripheral devices. Other buses are designed for use by multiple types of devices. In some circumstances, it may be desirable to track transactions that occur over the bus. Such information may be useful for a number of purposes including memory usage profiling, background content indexing, and storage device diagnostics etc. The present invention proposes a new approach for tracking such transactions over a memory related bus arranged to support multiple memory devices.